1. Field of the Invention
The present invention relates to the field of electrostatic protection of electronic devices.
2. Prior Art
Field effect devices, now more generally referred to as MOS devices, are characterized by an insulated gate over a channel region extending between doped source and drain regions. The gate insulation is a relatively thin oxide layer which, together with the relatively small gate, forms a capacitor of low capacitance and low breakdown voltage, usually approximately on the order of 10 volts. However, a typical electrostatic discharge as may occur when handling the device or associated circuitry in dry weather may easily reach 1,000 volts or more. Without electrostatic discharge protection, gate oxides will break down in a destructive manner when subjected to such high voltages, even from a relatively high impedance source, rendering the circuit permanently inoperative. As a result, various circuit designs and techniques have been used in the prior art to provide protection of MOS type integrated circuits, with various standardized testing procedures being used to verify satisfactory electrostatic discharge survival. By way of example, the IEC 1000-4-2 model requires electrostatic discharge protection for voltage spikes up to 15,000 volts, the voltage spike being delivered through a resistor of a predetermined value.